KnE Engineering

ISSN: 2518-6841

The latest conference proceedings on all fields of engineering.

Line Codes for Communication Systems

Published date: Jun 02 2020

Journal Title: KnE Engineering

Issue title: International Congress on Engineering — Engineering for Evolution

Pages: 599–608

DOI: 10.18502/keg.v5i6.7081

Authors:

António D. Reisadreis@ubi.ptUniversidade da Beira Interior

José F. RochaUniversidade de Aveiro

Atílio S. GameiroUniversidade de Aveiro

Jose P. CarvalhoUniversidade da Beira Interior

Abstract:

The coder is a generic device where exist a big types diversity. In base digital systems, the coder is a device that codifies the active input position in a number, normally, binary natural. If we have N inputs they are codified with n bits, N=2

References:

[1] D. A. Huffman, “A method for the construction of minimum redundancy codes”, in Proceedings IRE Vol.40 pp.1098-1101, 1962.

[2] H. Lohscheller, “A subjectively adapted image communication system”, IEEE Transactions on Comm. Com.32, pp.1316-1322, Dec. 1984.

[3] S. A. Vanstone, P. Oorschot, “An introduction to error correcting codes with applications”. Klumer Academic Publishers, 1989.

[4] ITU-T Recommendation H.261, ”Video codec for audiovisual services at px64 kbps”, 1993.

[5] A. Hefez, “Introdução à teoria dos códigos”. UNICAMP, 1994.

[6] Joan L. Mitchell, William B. Pennebaker, Chad E. Fogg, Didier J. LeGall, “MPEG video compression standard”, 1996.

[7] Roopali Garg, “Line Code for Optical Fiber Communication Systems”, IETE Journal of Education, Vol. 40, No. 3-4, PP. 93-100, Ponjab - India, Jul - Dec 1999.

[8] Demir Oner, “Criteria for Choosing Line Codes in Data Communication”, Journal of Electrical and Electronics Engineering, Vol. 3, No. 2, PP. 843-857, Istambul 2003.

[9] V. Sneha Latha et al, “Performance Evaluation of Different Line Codes”, Indian Journal of Computer Science and Engineering, Vol.2, No.4, PP. 575-588, India, Aug-Sep 2011.

[10] Ankit Gupta, Gurashish Singh, “Implementation and Analysis of Different Line Coding Schemes using Verilog”, International Journal of Science, Eng and Technology Research, Vol. 5, I. 2, PP. 395-401, India, Feb. 2016.

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