Published date: Feb 09 2017

Journal Title: KnE Engineering

Issue title: The International Conference on Design and Technology

Pages: 258-266

DOI: 10.18502/keg.v2i2.624

Gokul Sidarth Thirunavukkarasugthiruna@deakin.edu.au

Ragil Krishnaragil.ishere@gmail.com

The time taken for the scheduling task in a control system to reduce the traffic within the system is one of significant field of research in modern era. There are different control systems that require time scheduling such as elevator control system, traffic control system and train control system. Currently, there are unique control logic strategies adopting scheduling algorithm that are implemented in real time systems like earliest deadline first and ant colony optimization. At the same time, the disadvantages possessed by them are the exponential dip in the performance ratio due to over loading. Despite of all the available resources there are many issues faced such as congestion in traffic networks due to non-adaptive scheduling algorithms, etc., which led to several misfortunes and danger for human life. Hence an improved algorithm that increases the efficiency of the system is required to validate the processing time and the deadlines. Our research is focused on validating a proposed idea of using Arduino microcontroller to implement the different scheduling tasks and validate the efficiency of the algorithm to optimize the results of the system. This take cares of assigning the critical paths which priorities the tasks and focuses on reducing the scheduling time. This rapidly increases the processing speed and efficiency of the algorithm. We plan to use the Arduino board which has an inbuilt error detection algorithm that helps in checking whether the time scheduling is done effectively. In the initial phase of the project we develop and fabricate the hardware design using CAD design software packages like Solid Works. This is later employed with suitable environmental interfaces like, sensors and microcontrollers that can work in an adaptable environment as per requirements to validate the scheduling algorithm. The scheduling algorithm can also be used for controlling the current flow and power storage which will contribute a lot in the power consumption aspect. Graphical data interpretation of various algorithms from the past literature is observed and few selected ones are to be implemented in the experimental set up that is built as an initial proof of concept. By analyzing the results from the simulations carried out using the Altera FPGA board with VHDL and Arduino it is clear that we obtain better results using the Arduino board. Finally, to have an extensive study on different intelligent control logics that are used in the above mentioned control systems, we use the prototyped miniature model of an elevator system and a train control system to validate the different disk scheduling approaches like First Come-First Serve (FCFS), Elevator (SCAN) and ant colonization to solve the discrete combinational optimization of the scheduling logic. Initial validation of the system focuses on the effectiveness of using the ant colonization strategies to enhances the efficiency of the scheduling algorithm and optimize it for real time application.

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